(a) Field of the Invention
The present invention relates to a high frequency transformer for a differential amplifier, and more particularly, to a high frequency transformer for a differential amplifier that may improve power conversion efficiency and output power of an amplifier.
(b) Description of the Related Art
FIG. 1 is a schematic diagram for explaining an amplifier of a differential structure formed in an integrated circuit. Referring to FIG. 1, the amplifier of the differential structure includes an input-sided transformer A, a driver stage, a power stage, and an output-sided transformer B.
In FIG. 1, the input-sided transformer A receives a single-ended signal (RFIN) and then converts it into a differential signal. The driver stage amplifies the differential signal to generate power by which that the power stage may operate, and the power stage amplifies a signal received from the driver stage to be greater. The output-sided transformer B combines a differential signal received from the power stage to convert it into a single-ended signal (RFOUT) again.
Generally, although a corresponding amplifier is an amplifier of a differential structure, since input and output signals of the amplifier according to an internal operation thereof are mainly single-ended signals, the input-sided transformer A for converting a single-ended signal inputted to the amplifier into a differential signal and the output-sided transformer B for converting a differential signal outputted from the amplifier into a single-ended signal are necessarily used.
The input-sided and output-sided transformers serve to perform the conversion between the single-ended signal and the differential signal, and they also serve as a matching circuit between an input part and an output part thereof depending on a parasitic inductance, a predetermined winding ratio, etc. Particularly, the winding ratio and the parasitic inductance of the output-sided transformer B importantly serves to form an output matching part, which directly affects the power conversion efficiency, the maximum output power, etc. of the entire amplifier. Therefore, a distance, an entire size, a width, a predetermined winding ratio, etc. between metal lines of primary and secondary parts of the output-sided transformer B are determined by considering performance of the amplifier such as a target output power and a target power conversion efficiency thereof.
FIG. 2 is a schematic diagram for explaining a shape of an output-sided transformer shown in FIG. 1. FIG. 2 illustrates a state in which a primary part 21 of an output-sided transformer 20 is connected to a differential signal line of an output terminal of a power stage 10.
FIG. 2(a) illustrates a case in which a winding ratio of the primary part 21 and the secondary part 22 of the output-sided transformer 20 is 1:1, and FIG. 2(b) illustrates a case in which a winding ratio of the primary part 21 and the secondary part 22 is 1:2. A virtual ground 23 is formed at primary part 21 by the differential signal, and a power source voltage of the amplifier is supplied through the virtual ground 23. Accordingly, although only an AC current or an RF current exists in the secondary part 22 of the output-sided transformer 20, a DC current as well as an AC current or an RF current exist in the primary part 21 thereof.
The transformer illustrated in FIG. 1 and FIG. 2 is an example in which the transformer is integrated together with an amplifying stage in an integrated circuit. In the case of a typical CMOS process, excessive process costs are required to increase a thickness of the metal line in the integrated circuit. Accordingly, as shown in FIG. 1 and FIG. 2, when the transformer is integrated in the CMOS process, the thickness of the metal line for forming the transformer ranges from about 0.5 μm to about 2.0 μm. The thickness of the metal line does not become a problem in the case of using a low power, but a power leaked from the transformer indispensably increases in the case of using a high power of about 0.1 Watt or more, thereby reducing power conversion efficiency. In addition, the maximum output power of the amplifier may decrease due to power loss of the output-sided transformer, and a power gain of the amplifier may decrease due to power loss of the input-sided transformer.
In order to solve the problems, the Related Art forms the transformer through an integrated passive device (IPD) process rather than the CMOS process. A device manufactured by such an IPD process is classified into an integrated circuit chip as in the case of the CMOS. However, unlike the CMOS process, the IPD process does not include a process for a transistors or a diode, but includes only a process forming a passive device such as a resistor, inductor, and capacitor.
A metal line formed by the IPD process may be much thicker than that formed through the CMOS process in low manufacturing costs, thus it may reduce ohmic loss of a transformer more than when formed through the CMOS process. Further, in the case of a typical CMOS process, an AC or RF signal flowing through the metal line is attenuated in a lossy substrate, while the IPD may easily reduce loss in the substrate. Accordingly, when a transformer is formed by the IPD, a total power loss may be reduced.
FIG. 3 is a schematic view for connecting an amplifying stage formed by a CMOS process to a transformer formed by an IPD process. FIG. 3 illustrates a schematic diagram in which a primary part 41 of an output-sided transformer 40 is connected to an output side of a power stage 30, wherein a winding ratio of the primary and secondary parts 41 and 42 of the transformer 40 is about 1:2.
When the transformer 40 is formed through the IPD process, a manufacturing process of connecting the transformer 40 formed through the IPD process and the amplifying stage 30 formed through the CMOS process to each other is additionally required in order to design one amplifier. In this case, a circuit connection between the CMOS and IPD processes is generally performed by using a bonding wire 50.
However, since a manufacturing error of the bonding-wire is relatively large unlike the integrated circuit process, it is difficult to apply the bonding-wire to an amplifier having a high frequency bandwidth. In addition, power loss occurs due to the bonding wire, and it is impossible to manufacture two bonding wire to have the exactly same shape and parasitic inductance. Accordingly, considering power leak due to asymmetry between the bonding wires, the effect according to the IPD process is reduced. Further, although it is possible that the transformer and the amplifying stage are formed in one integrated circuit through the CMOS process in FIG. 2, in the case of FIG. 3, after separately forming two integrated circuits, since they are connected to each other, a size of the entire circuit may be additionally increased.
According to another related art for overcoming such a problem, an input-sided or output-sided transformer is formed through a micro electro mechanical system (MEMS) process. FIG. 4 illustrates a schematic diagram in which a transformer formed through the MEMS process is connected to an amplifying stage formed through the CMOS process. FIG. 4 illustrates a case in which a primary part 71 of an output-sided transformer 70 is connected to a power stage 60 and a winding ratio of a primary part 71 and a secondary part 72 is about 1:2.
In general, after the CMOS process is completed, a metal line is formed on a CMOS IC through the MEMS process which is a subsequent process of the CMOS process. Accordingly, an amplifying stage 60 formed on the CMOS and the transformer 70 formed through the MEMS are connected to each other through via-paths 80 in the MEMS process. Thus, according to the method of FIG. 4, the entire size of the system may be reduced compared with the transformer formed with the IPD, and since the via-paths have a fewer process errors than bonding-wire, it is possible to manufacture a reproducible circuit.
However, in the case of FIG. 4, resistive power loss occurs at the via-paths 80 at which the transformer formed through the MEMS process and the amplifier formed through the CMOS process are connected. In addition, since the MEMS process provides a lower resolution than the CMOS process, a width between two via-paths 80 shown in FIG. 4, that is, a distance between differential signal lines should be wider than that of the transformer formed in the CMOS, and a pad 61 of the CMOS required to form the via-paths should be also widely formed.
Accordingly, as shown in FIG. 4, in the case of the transformer formed through the MEMS process, while the transformer formed in the MEMS and the amplifier formed in the CMOS are connected to each other, a circuit area of the CMOS increases, and power loss occurs due to the via-paths. In addition, there is another problem which is illustrated in FIG. 5.
FIG. 5 illustrates a line portion of the transformer of FIG. 4. Since the MEMS process increases a thickness of the metal line compared to the CMOS process, resistance of the metal line decreases. However, since the resolution by the MEMS process is relatively low compared to that by the CMOS process, a distance (L) between two adjacent metal lines thereof should be relatively wide compared to that of the CMOS. This causes a size of the transformer to increase.
Moreover, in the transformer, the electric power of the primary part is transferred to the secondary part by inductive coupling between two adjacent metal lines, and in this case, if the distance (L) between the two adjacent metal lines is wide, the inductive coupling weakens, thus it is not easy to transfer the electric power from the primary part to the secondary part, thereby deteriorating power conversion efficiency.
Until now, although there has been many reports at a research level about the low ohmic loss which is the advantage of the MEMS technology, the main reason why the MEMS technology is rarely applied to the integrated circuit includes the via-path forming process necessarily required to be actually applied to the CMOS and loss occurring due to the via-path forming process, the additional circuit area required due to the low resolution, and the low inductive coupling.
Resultantly, in the forming of the input-sided and output-sided transformers for the amplifier of the differential structure, when the amplifying stage and the transformer are formed to be integrated together in the CMOS process as shown in FIG. 2, although the size of the entire circuit thereof decreases, the ohmic loss increases due to the thick thickness of the metal line, and the power leak occurs due to an eddy current associated with the lossy substrate.
In addition, as shown in FIG. 3, when the transformer is formed with the IPD, although the IPD process is simple, the power loss and the size of the entire circuit increase due to the asymmetry and the resistance of the bonding wire.
Further, as shown in FIG. 4, when the transformer is formed through the MEMS process, although the entire size of the circuit decreases more than when the transformer is formed with the IPD and the bonding wire is not used unlike the case in which the IPD is used, the processes therefor are complicated, the power leak occurs due to the via-path, and since the metal lines cannot be closely formed due to the low resolution, the inductive coupling weakens, thereby deteriorating the power conversion efficiency.
The background art of the present invention is disclosed in the Korean Patent No. 0743951 (published on Aug. 1, 2007).
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.